Xilinx Vivado Design Suite 2015.2

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I am just starting out with an fmcomm3 eval board and the ZC706. I would like to use the MathWorks Workflow Advisor reference design tools to create a Vivado project with explicit locations to insert RX and TX custom IP, as well as to use with the HDL Coder tools. However, that reference design in the github repo appears to require Vivado 2015.2.1, which does not appear to be available from Xilinx currently--the Vivado 2015.2 Update 1 file is listed in their downloads section, but gives an error that the file is not available when I try to download it.

I have the same issue with Vivado that I could not download these update but after contacting Xilinx support I received email with package with update so if you still need this, I am offering you help. Also I am trying to build a project from analog github. This a project i Mathworks repository. In folder hdl_wa_bsp/vendor/AnalogDevices/vivado there are some projects. My question is: Is there a possibility to build this project like the hdl reference design?

validate_bd_design: Time (s): cpu = 00:00:19 ; elapsed = 00:00:19 . Memory (MB): peak = 2461.672 ; gain = 0.000WARNING: [Vivado 12-818] No files matched './vivado_prj.srcs/sources_1/bd/system/system.bd'WARNING: [Vivado 12-818] No files matched './vivado_prj.srcs/sources_1/bd/system/system.bd'ERROR: [Common 17-53] User Exception: No open project. Please use Save Project As to save your work and re-do this operation. 2b1af7f3a8